Reducing Wasteful Recurrence of Aborts and Stalls in Hardware Transactional Memory

Info

Koshiro HASHIMOTO, Masamichi ETO, Shoichiro HORIBA, Tomoaki TSUMURA, Hiroshi MATSUO : "Reducing Wasteful Recurrence of Aborts and Stalls in Hardware Transactional Memory", Proc. 2013 High Performance Computing & Simulation Conf. (HPCS2013) ,pp374--381 (Jul. 2013) Proceeding

Abstract

Lock-based thread synchronization techniques have been commonly used in parallel programming on multi-core processors. However, lock can cause deadlocks and poor scalabilities. Hence, transactional memory has been proposed and studied for lock-free synchronization. However, the performance can decline with some conflict patterns in TM. Therefore, this paper proposes two methods to restrain the occurrence of very harmful conflicts. The one relieves starving writers who will keep stalling for a long time. The other serially executes highly conflicted transactions which tend to abort repeatedly. The result of the experiment shows that the merged model of these two methods improves the performance 72.2% in maximum and 28.4% in average.